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I suppose you have tried on the sample chuck (D3100 stage) to see whether the measured potential follows the change in Bias. This is a quick way to verisfy whether the system is set up properly. Once you have done this, you can move on to your sample. For surface potential measurement, a reliable electrical connection to the sample is required; simply
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Hi Saumil, That chip carrier that you pointed out allows you to bias the tip. With the regular carrier the tip is always grounded. In order to apply a bias (which the software always allows) you have to route the bias voltage to the sample. So if you can live with biasing the sample you don't need any additional parts. Stefan
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Dave, You can see surface potential variation arising from the different doping levels on the SCM sample (SRAM), but it is not an ideal sample to check/calibrate KPFM. The problem with semiconductor samples in general is that some surface states can inevitably appear in the bandgap which can mask the fermi-energy level of the semiconductor and dictate
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What is the difference between elechrochemical AFM and electric field AFM and surface potential AFM in terms of equipment (cantilevers, operating modes etc.)
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could it be used also for electrical (coulombian) forces, like in KPM?
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This talk of calibration standards has brought up another question- where to get electrical reference standards for techniques such as scanning spreading resistance (SSRM) or scanning capacitance (SCM)? I'm talking about a stack of layers of known doping concentration and thicknesses of epitaxially grown silicon, usually set up as a sequence of